From: Michael D. Lowis <mike@mdlowis.com>
Date: Wed, 22 Nov 2023 04:19:11 +0000 (-0500)
Subject: added assembly generation for ifs
X-Git-Url: https://git.mdlowis.com/?a=commitdiff_plain;h=aaa18f6933f1ac341d27352326d5e24dbed4debe;p=proto%2Faas.git

added assembly generation for ifs
---

diff --git a/cerise.rb b/cerise.rb
index 8fad22d..bb3cdf8 100755
--- a/cerise.rb
+++ b/cerise.rb
@@ -849,6 +849,13 @@ class Parser
 end
 
 module Codegen
+  @@label_count = 0
+
+  def self.genlabel()
+   label = @@label_count
+   @@label_count = @@label_count + 1
+  end
+
   def self.emit(syms, v)
     if v.is_a? IR::Return then
       emit_return(syms, v)
@@ -940,7 +947,6 @@ module Codegen
   end
 
   def self.emit_def(syms, v)
-    puts "#    def #{v.name} = #{v}"
     syms.add_sym(
         v.name.name, v.loc, :local, v.type, v.value)
     emit(syms, v.value)
@@ -952,7 +958,22 @@ module Codegen
   end
 
   def self.emit_if(syms, v)
-    puts "#    if "
+    lbl1 = genlabel()
+    lbl2 = genlabel()
+    emit(syms, v.cond)
+    puts "    jmp_if0 :L#{lbl1}"
+    emit_block(syms, v.then)
+    puts "    jmp :L#{lbl2}"
+    puts "label :L#{lbl1}"
+    emit_block(syms, v.else)
+    puts "label :L#{lbl2}"
+  end
+
+  def self.emit_block(syms, v)
+    return if v.nil?
+    v.each do |v|
+      emit(syms, v);
+    end
   end
 end